PTN3460BS/F3Y

PTN3460BS/F3Y is an eDP to LVDS bridge IC. It is an (embedded) DisplayPort to LVDS bridge device that enables connectivity between an (embedded) DisplayPort (eDP) source and LVDS display panel. It processes the incoming DisplayPort stream, performs DP to LVDS protocol conversion, and transmits the processed stream in LVDS format. It has two high-speed ports: a receive port facing the DP source (for example, CPU/GPU/chipset) and a transmit port facing the LVDS receiver (for example., LVDS display panel controller). It can receive DP stream at link rate 1.62Gbit/s or 2.7Gbit/s and it can support 1-lane or 2-lane DP operation. It interacts with the DP source via DP Auxiliary (AUX) channel transactions for DP link training and setup. It supports single bus or dual bus LVDS signalling with colour depths of 18bits per pixel or 24bits per pixel and pixel clock frequency up to 112MHz. The application includes AIO platforms, notebook platforms, and netbooks/net tops.

• Embedded microcontroller and on-chip Non-Volatile Memory allow for flexibility in firmware updates
• LVDS panel power-up (/down) sequencing control
• Firmware controlled panel power-up (/down) sequence timing parameters
• No external timing reference needed
• Supports EDID structure v1.3, on-chip EDID emulation up to seven different EDID data structures
• eDP complying PWM signal generation or PWM signal pass through from eDP source
• Power supply: with on-chip regulator, ESD: 8KV HBM, 1 kV CDM
• Supply voltage range from 3.0 to 3.6V(3.3V), 1.7 to 1.9V (1.8V)
• Modulation frequency range from 30 to 100KHz (centre spreading)
• HVQFN56 package, ambient temperature range from 0 to 70°C