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Quantité | Prix (hors TVA) |
---|---|
1+ | 19,290 € |
10+ | 17,860 € |
25+ | 17,300 € |
50+ | 16,880 € |
100+ | 15,760 € |
Informations produit
Aperçu du produit
CY7C10612G30-10ZSXI is a high performance CMOS fast static RAM device with embedded ECC. The device includes an error indication pin that signals an error detection and correction event during a read cycle. To write to the device, take chip enables (active-low CE) and write enable (active-low WE) input LOW. To read from the device, take chip enable (active-low CE) and output enable (active-low OE) LOW while forcing the write enable (active-low WE) HIGH. The input or output pins (I/O0 through I/O15) are placed in a high impedance state when the device is deselected (active-low CE HIGH), the outputs are disabled (active-low OE HIGH), the active-low BHE and active-low BLE are disabled (active-low BHE, active-low BLE HIGH), or during a write operation (active-low CE LOW and active-low WE LOW).
- Embedded error-correcting code (ECC) for single-bit error correction
- Low active current ICC is 90mA typical
- Low CMOS standby current ISB2 is 20mA typical
- Operating voltages of 3.3 ±0.3V
- 1.0V data retention
- Transistor-transistor logic (TTL) compatible inputs and outputs
- ERR pin to indicate 1-bit error detection and correction
- High speed, tAA=10ns
- 54-pin TSOP II package
- Industrial ambient temperature range from -40°C to +85°C
Spécifications techniques
SRAM asynchrone
1M x 16bits
54Broche(s)
3.6V
-
-40°C
-
No SVHC (21-Jan-2025)
16Mbit
TSOP-II
3V
3.3V
Montage en surface
85°C
MSL 3 - 168 heures
Documents techniques (1)
Législation et Questions environnementales
Pays dans lequel la dernière étape de production majeure est intervenuePays d'origine :Taiwan
Pays dans lequel la dernière étape de production majeure est intervenue
RoHS
RoHS
Certificat de conformité du produit